On Thursday, October 18, more than 100 attendees visited the CAN FD TechDay in Detroit. Bosch and CiA organized this event jointly. OEMs, chipmakers, and tool provider presented their views on the CAN FD technology. First FPGAs implementing the CAN FD data link layer protocols and first tools were shown on the tabletop exhibition. The protocol will be submitted as ISO 11898-7 for international standardization
|Detroit, the Motor City, hosted the first CAN FD TechDay with more than 100 attendees|
NATALIE WIENCKOWSKI WORKING WITH GENERAL MOTORS (GM) pointed out that the US carmaker is going to use CAN FD to shorten the flashing of ECUs. From 2016 onwards, micro-controllers need to be available for OEMs to begin system integration and testing to allow implementation of CAN FD for inter ECU communication prior to running out of bus bandwidth. She stated clearly, that there is no intention to substitute existing network technologies. But she requested Autosar support for CAN FD, which will be available soon. In Autosar version 4.1.1 CAN FD frames with an 8-byte payload will be supported, and for version 4.2.1 the maximum payload of up to 64 byte will be possible. For the in-vehicle networks, most of the carmakers have implemented star-topologies, which limits the speed increase to 2 or 4 Mbit/s using todays off-the-shelf CAN transceiver chips. However, for the communication between programming and diagnostic tools to the on-board gateway, a bus-line topology seems to be suitable.
GM plans for this link data-rates up to 8 Mbit/s. Natalie Wienckowski discussed also the requirements regarding the oscillator frequency and accuracy as well as setting of the sample-point for the data phase. She recommended the sample-point between 70 % and 80% of the bit-time (0,5 µs at 2 Mbit/s).
|The pre-announced CAN FD prototype gateway is joint development of Bosch, Daimler (Truck), and NXP|
Marc Schreiner from Daimler’s truck division discussed in his presentation the need for CAN FD. Already today, the Actros trucks implement up to twelve CAN networks running and 500 kbit/s respectively 667 kbit/s. In order to add new functions higher bandwidth is required. In addition, higher throughput would eventually allow merging some of today’s networks, in order to decrease the number of gateway/router devices. He presented some simulation results showing that CAN FD doesn’t decrease signal integrity. Daimler, Bosch, and NXP are developing jointly a sample CAN FD gateway device. It is based on a Renesas micro-controller connected to two CAN FD controllers implemented in an FPGA by Altera. For third parties, it will be available end of next year.
“To use CAN FD in the next vehicle generation (approximately 2016/17) a dependable roadmap of MCUs with CAN FD must be available by mid of 2013,” requested Schreiner. The first chipmakers already disclosed their CAN FD roadmaps and pre-announced CAN FD products.
STM will provide first sample MCUs with CAN FD8 (with just an 8-byte payload) within the next weeks. In spring 2013, a full CAN FD on-chip module will be available allowing the transmission of frames with a 64-byte data-field. Also Freescale will support CAN FD in all of its MCUs dedicated for powertrain applications. MCUs for other applications such as chassis, safety, and body will follow. First samples are planned for end of this year.
|The CAN FD demonstrator runs at an arbitration data-rate of 1 Mbit/s and 10 Mbit/s during the dataphase with a total network length of 40 m using off-the-shelf CAN transceiver chips|
The US chipmaker evaluates the development of CAN transceiver chips with partial-networking capability. These chips are able to ignore CAN FD messages CAN FD frames. NXP pre-announced already in Detroit such components.
The TJA1145FD transceiver, which provides partial networking according to ISO 11898-6 and features an additional register set for ignoring CAN FD messages. This allows the coexistence of traditional CAN nodes and CAN FD nodes in one network. When CAN FD communication is required, all traditional CAN nodes are set to deep-sleep. The “sleeping” transceivers are configured to ignore the CAN FD traffic, and are awaked by a normal CAN wake-up message, when the CAN FD communication (e.g. software download) has been finished. The CAN FD ignorance register set is not yet in the ISO 11898-6 standard. Samples of this transceiver will be available in the first quarter of 2013.
|The SJA1145 by NXP will comprise a partial networking transceiver compliant to ISO 11898-6 and a CAN FD controller and communicates with the micro-controller via SPI|
NXP also launched the SJA1145 CAN FD protocol controller with on-chip transceiver. The transceiver part complies with the TJA1145FD chip (see above) and is specified for transmission rates up to 2 Mbit/s. The SPI host controller interface is capable to forward the received data. The CAN FD protocol controller supports 64 byte data fields. With this single-chip, the Dutch chipmaker offers a simple migration path for existing CAN connectable devices, by exchanging just one chip. However, the SJA1154 requires a precise external clock. Samples will be available in the third quarter 2013, full production is planned for the fourth quarter 2014.
Etas and Vector presented their plans for CAN FD tools. Etas will provide a CAN FD option for its ES890 bus interface module and is preparing its ES59X series of ECUs as well as its ES9XX family of modular rapid prototyping hardware for CAN FD communication. Also the open-source Busmaster analyzing tool is ready to support CAN FD communication (http://rbei-etas.github.com/busmaster/).
Due to the fact that Vector’s DBC database format supports 64-byte entries, CAN FD messages can be described using this industry standard. The German toolmaker will support CAN FD in its CANoe and CANalyzer tools by end of 2012. The initial support is restricted to 8-byte data fields, 64-byte support will follow in 2012. The VN1630 interface module is the first with up to four CAN FD ports. The VN1610/11/40 will follow shortly. Bosch, Etas, and Vector showed in Detroit the same CAN FD demonstration as at the 13th international CAN Conference at the Hambach Castle in Germany. Interesting was that Kvaser (Sweden) added to the network ad hoc a CAN FD module with an own non-commercial FPGA implementation. After setting the bit-timing registers, it was working.
You saw a “more” dominant Acknowledge-slot bit, which indicated a correct implementation of the CRC polynomials. It was so-to-say a first proof of the CAN FD protocol description by a third party. By the way, the CAN FD prototype network was running 1 Mbit/s (arbitration phase) and 10 Mbit/s (data phase) using a bus topology with short stubs. The network length was 42 m.
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