The AMC-CAN4 mezzanine module by ESD (Germany) features four CAN high-speed interfaces according to ISO 11898-2. The CAN interfaces are electrically isolated against the controller potential and against each other. CAN status is displayed by two LEDs for each CAN channel placed at the RJ45 connectors.
THE DEVICE-INTERNAL DATA TRANSFER between the four independent CAN ports is managed by the company’s own CAN controller (ACC) implemented in the Xilinx Spartan 3e FPGA. Controlled by the FPGA the module supports PCI mastering as an initiator, meaning that it is capable of initiating write cycles to the host CPU’s RAM independent of the CPU or the system DMA controller. This results in a reduction of overall latency on servicing I/O transactions in particular at higher bit-rates.
The CAN layer-2 (CAN-API) software drivers are available for Windows, RTX, VxWorks, QNX and Linux operating systems supporting up to 24 CAN networks. Drivers for other operating systems are available on request. The CANopen and J1939 software packages are available for the above-mentioned operating systems. Driver software for Arinc 825 protocols is provided as well.
The CAN interfaces support 11-bit and 29-bit CAN identifiers. The receive buffer is able to store 64 messages. The acceptance filter consists of a 4-byte code and 4-byte mask. Both CAN error counters are readable, and the warning limit is configurable. Data rates up to 1 Mbit/s are possible and automatic bitrate detection is supported. Other features of the CAN implementation include arbitration lost interrupt with detailed bit position, single-shot transmission (no automatic re-transmission), and listen-only mode (no acknowledge, no active error flags). In the self-reception mode the CAN module receives itself its transmitted messages.
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