IFI (Germany) provides CAN FD silicon implemented in different FPGAs from Altera. The user can switch between ISO and non-ISO mode.
In order to give its customers the possibility to switch between both protocols (ISO and non-ISO CAN FD), the user needs to set or clear the ena_ISO bit in the CMD register before writing all the control words. Earlier this year, the company added the configuration bit 26, so customers can switch the bit-timing independent from the ena_ISO bit. The implementation provides 256 message filters with one mask and one ID register. This allows a flexible hardware acceptance filtering. The message FiFOs for received and transmitted messages can be configured (1 KiB to 64 KiB) in order to save memory resources. The products come with example software and HAL drivers for NIOS II.
There is a 32-bit time stamping function implemented for received and transmitted messages. For resolutions up to 64 bit an external interface is provided. To connect MCUs to the stand-alone CAN FD controller, the chips provide 8-, 16-, 32-, or 64-bit interfaces. Interesting is that the user can read out the configured timing parameters.
The CAN FD core has been implemented on Altera products. One of the first users was Vector followed by HMS (formerly Ixxat). The IP core has been pretested by the c&s group. Of course, the CAN FD core can be added to already existing circuitry in Altera ASICs and FPGAs.
News and reports