Embedded World 2018
The M_CAN core by Bosch will support hardware time-stamping according to CiA 603 in the next release. Up to sixteen 32-bit time-stamps are possible.
Bosch pre-announced on its Embedded World 2018 booth an updated M_CAN IP-module. It features the TSU (time-stamping unit), which captures time-stamps at EOF (end-of-frame) of received and transmitted CAN data and remote frames. The M-CAN core complies with ISO 11898-1:2015 and supports the Classical CAN and the CAN FD protocols. The time-base is a 32-bit-counter (with an 8-bit prescaler) or an external 32-bit counter connected to the TSU’s time-base input. The internal time-base is also visible at the TSU’s time-base output. The DMU (DMA interface unit) supports DMA block transfers of Tx/Rx FIFO elements between message RAM and system memory. It supports the transfer of timestamps from the above-mentioned TSU. Additionally, it allows off-loading tasks from the host controller (CPU) to the DMA controller. The M_CAN core has been licensed to several market-leading chipmakers including Intel. It can be integrated onto micro-controllers, ASICs, and FPGAs (Intel or Xilinx). The conformance-tested IP modules support optionally TTCAN (time-triggered CAN) as standardized in ISO 11898-4. They feature two clock domains (host and CAN clock). Power-down support is provided. The core has 64 receive buffers and two configurable receive FIFOs (first-in, first-out) as well as 32 transmit buffers and one transmit queue (FIFO). A Linux software driver is available.