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Multi-core MCU

Dedicated for Asil-D applications

The S32S micro-controller by NXP features up to eight CAN FD interfaces. The 800-MHz MCU is intended for automotive safety ECUs.

The S32S micro-controller complies with safety performance level Asil-D (Photo: NXP)

“We see that the shift to next-generation autonomous and electric vehicles is introducing huge challenges to carmakers,” said Ian Riches from Strategy Analytics Global Automotive Practice. “Not least of these is the ability to get silicon in hand fast enough and with enough performance headroom to ease the transitions to autonomous and advanced HEV/EV. A car can be extremely intelligent, but if it can’t act safely on a decision, you don’t have a reliable autonomous system at all.”

This is why NXP has developed the S32S multi-core MCU featuring Asil-D functionality (ISO 26262). It uses an array of the Arm Cortex-R52 cores. The array offers four fully independent Asil-D capable processing paths to support parallel safe computing. In addition, the S32S architecture supports a new “fail availability” capability allowing the device to continue to operate after detecting and isolating a failure – a critical capability for future autonomous applications.

NXP has partnered with Opensynergy to develop a real-time hypervisor supporting the NXP S32S products. The Coqos Micro SDK is one of the first hypervisor platforms that takes advantage of the Arm Cortex-R52’s special hardware features. It enables the integration of multiple real-time operating systems onto micro-controllers requiring Asil-D performance. Multiple-vendor independent OS/stacks can also run on a single micro-controller. Coqos Micro SDK provides secure, safe, and fast context switching ahead of today’s software-only solutions in traditional micro-controllers.

The MCU with up to eight CAN FD ports is suitable for several ECUs (Photo: NXP)

Additional features include up to 64 MiB of flash memory supporting on-the-fly, over-the-air program updates with no processor downtime. The user-programmable hardware security engine supports private and public keys. There are advanced electric motor control peripherals with included motor control software libraries. The provided PCIe interface is suitable for ADAS domain supervisory applications.

For the S32S platform several software and tools are available, for example Autosar MCAL and OS, security firmware, safety SDK, hardware development tools including NXP Greenbox Electrification Platform. “When we started the development of the S32S it was clear that just building another incremental micro-controller was not what customers needed to handle the safety and performance requirements of next-generation and autonomous vehicles,” explained Ray Cornyn from NXP. “Our new safety processors leverage the high performance multi-core benefits of the S32 Arm platform while still supporting traditional microcontroller ease of use and environmental robustness.” The S32S will be sampled in the fourth quarter of 2018.


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